The present invention relates to the structure of a high voltage MIS transistor and, in more particular, to an integrating technology which aims at reducing integration loss and enhancing device reliability in integrating such a transistor with a CMOS transistor or the like.
In FIG. 19, there is shown the structure of a conventional high voltage MOS transistor. The high voltage MOS transistor is an IGBT of a horizontal type which can be driven or controlled by a gate signal to be given to a gate electrode 2111. In the high voltage MOS transistor, an emitter region to which an emitter electrode 2114 is connected is spaced apart from a collector region to which a collector electrode 2115 is connected, whereby there is secured an emitter-collector voltage withstanding. Also, in the high voltage IBGT, a p-type buried layer 2102 is formed on the surface side of a p-type semiconductor substrate 2101, and an n-type epitaxial layer 2103 laid on the surface side of both the substrate 2101 and layer 2102 is separated into a semiconductor island region by a p-type isolation diffusion layer 2104 which is formed so as to extend from the surface side of the epitaxial layer 2103 to the buried layer 2102. In one end portion of the epitaxial layer 2103, there is provided a p-type base layer 2109 which is formed by diffusion so as to extend from the epitaxial layer 2103 to the isolation diffusion layer 2104, while on the surface of the base layer 2109 there are formed an n.sup.+ -type emitter layer 2108 and a p.sup.+ -type base contact layer 2107. And, the emitter electrode 2114 is connected to both the emitter layer 2108 and base contact layer 2107. Also, the epitaxial layer 2103 includes in the other end portion thereof an n-type base layer 2105 which is formed by diffusion, a p-type collector layer 2106 which is formed on the surface of the base layer 2105, and a p.sup.+ -type contact layer 2110 which is formed inside the collector layer 2106. And, the collector electrode 2115 is connected to the contact layer 2110. Also, on the surfaces of the n.sup.+ -type emitter layer 2108, p-type base layer 2109 and n-type epitaxial layer 2103, there is provided the gate electrode 2111 through a gate oxidized film 2112. On the surface of the epitaxial layer 2103, there is provided an oxidized film 2113 which is formed by extending the gate oxidized film 2112 integrally therewith and is greater in thickness than the oxidized film 2112.
In the high voltage IGBT having the above-mentioned structure, if a collector voltage, which is positive with respect to an emitter potential to be applied to the emitter electrode 2114, is applied to the collector electrode 2115 and a gate potential, which is positive with respect to the emitter potential, is applied to the gate electrode 2111, then the surface of the base layer 2109 just below the gate electrode 2111 is inverted to operate as a channel, so that a MOSFET consisting of the emitter layer 2108, base layer 2109 and epitaxial layer 2103 turns on. As result of this, electrons flow from the emitter electrode 2114 through the emitter layer 2108 and the channel formed on the surface of the base layer 2109 into the epitaxial layer 2103. This means that a base current is supplied to a first pnp transistor consisting of the collector layer 2106, epitaxial layer 2103 and semiconductor substrate 2101 and to a second pnp transistor consisting of the collector layer 2106, epitaxial layer 2103 and base layer 2109 and thus the first and second pnp transistors are caused to turn on. This causes the collector layer 2106 to inject positive holes into the epitaxial layer 2103, so that the epitaxial layer 2103 is turned into a so-called conductivity modulation state in which electrons and holes exist together. In other words, the high voltage IGBT is operable at a low on-voltage and is also able to handle a high current.
Here, in the high voltage IGBT, since the gate electrode 2111 is disposed in such a manner as to extend over the gate oxidized film 2112 and the thicker oxidized film 2113, the gate electrode 2111 can relax the electric concentration at the collector terminal of the gate electrode 2111 and thus the device voltage resistance can be maintained.
Also, the collector region has a dual diffusion structure in which the collector layer 2106 is formed within the base layer 2105 and, for this reason, when the device is off, it is possible to prevent the punch-through of a depletion layer which extends from a pn junction between the epitaxial layer 2103 and the base layer 2109, isolation diffusion layer 2104, buried layer 2102 and semiconductor substrate 2101.
Referring now to FIGS. 20 (a) and 20 (b) there is shown another example of a conventional high voltage MOS transistor. This high voltage MOS transistor is an n-channel type lateral MOSFET which is driven and controlled by a gate signal applied to a gate electrode 2124 and has a high voltage structure. In particular, FIG. 20 (a) is a plan view of the structure of the high voltage MOSFET and FIG. 20 (b) is a section view taken along the line A--A' shown in FIG. 20 (a). In FIG. 20, parts corresponding to those shown in FIG. 19 are given the same designations. The high voltage MOSFET includes a p-type semiconductor substrate 2101, a p-type buried layer 2102 formed on the surface side of the semiconductor substrate 2101, an n-type epitaxial layer 2103 formed on the surface side of the substrate 2101 and buried layer 2102, and a p-type isolation diffusion layer 2104 which isolates the epitaxial layer 2103 to a semiconductor island region. And, within a p-type base layer 2109 formed so as to extend from one end portion of the epitaxial layer 2103 to the isolation diffusion layer 2104, there are formed a p.sup.+ -type base contact layer 2107 and an n.sup.+ -type source layer 2121, to both of which a source electrode 2125 is connected. Also, on the surface of the other end portion of the epitaxial layer 2103, there is formed an n.sup.+ -type drain layer 2122 to which a drain electrode 2123 is connected. Further, on the surfaces of the source layer 2121, base layer 2109 and epitaxial layer 2103, there is provided the gate electrode 2124 through a gate oxidized film 2112. In this high voltage MOSFET, for the drain electrode 2123 which is situated in the central portion of the device, a drain pad 2128 is provided externally of the element and the drain electrode 2123 is connected to the drain pad 2128 by means of a drain wire 2126, so that wiring can be achieved easily in integration. The drain wire 2126 is also connected to the epitaxial layer 2103, source layer 2121 and gate electrode 2124 through an inter-layer insulation film 2127 which is formed on the top portions thereof.
In recent years, there has been an increased development of a power IC which can integrate a power transistor with a high withstand voltage of several hundred V (volts) or more and a high current output of the order of several A (amperes) and a control circuit part operable on a low voltage of about 5 V into one chip, and the power IC has been widely applied to household electrical appliances and the like. In order to realize such power IC at low costs, it is indispensable to reduce the size of the chip. Therefore, in the power IC, it is important to reduce the size of the power transistor part which occupies a large area. Also, in manufacturing the power transistor part, if the number of manufacturing steps thereof is increased, then it is impossible to reduce the manufacturing costs of the power IC.
However, in the above-mentioned conventional high voltage MOS transistor, due to the fact that the element isolation must be taken into consideration, and the formation of the embedded layer, the epitaxial growth and the formation of the isolation diffusion layer are also necessary, when combining these components into one chip to thereby form an integrated circuit, the number of manufacturing steps is increased, which results in expensive costs. Also, although the high voltage IGBT shown in FIG. 19 is operable at a low on voltage due to the conductivity modulation of the epitaxial layer 2103 and is also able to handle a high current, because the pnp transistor becomes saturated, when the IGBT is turned off, it takes a long time to sweep out minority carriers stored in the epitaxial layer 2103 and semiconductor substrate 2101, which provides a great loss when performing a high speed switching in the range of 200 kHz to 1 MHz. Further, because of flow of a great sweeping current, a parasitic thyristor is actuated to cause a fear that the turn-off capability itself is lost.
On the other hand, in the high voltage MOSFET shown in FIG. 20, because a depletion layer spreads in a lateral direction, in order to secure a required withstand voltage, a long offset layer is necessary. However, it is difficult to secure the sectional area of the offset layer and, therefore, when the MOSFET is on, resistance easily increases. Also, as mentioned above, the drain wire 2126 connecting the drain electrode 2123 to the drain pad 2128 is disposed above the epitaxial layer 2103, source layer 2121 and gate electrode 2124 through the inter-layer insulation film 2127. However, in an LSI process, the inter-layer insulation film 2127 can be formed such that the thickness thereof is only of about 6000 .ANG. to 10000 .ANG. and, for this reason, when a high potential is applied to the drain electrode 2123, an excessive electric field concentration occurs in the drain side end portion of the gate electrode 2124. As a result of this, even if a sufficient distance is secured between the gate electrode 2124 and drain layer 2122, only the withstand voltage of 200 V can be realized and thus it is difficult to secure the reliability of the device.